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RE: Classic Plus Development Updates - Snuffytime - 08-06-2022

Hanging out for when this becomes available!

Feature Creep:
Has there been any thought given to setting a sound standard for the 'Bee beyond the 1-bit clicking of port 2[6]? Any of the popular sound generator chips of the 80s still available, or add something in to the FPGA?

Also, will there be enough room in the FPGA to add 1 or more sprites - handy for building a mouse-driven UI?


RE: Classic Plus Development Updates - MbeeTech - 08-06-2022

(08-06-2022, 01:05 PM)Snuffytime Wrote: Hanging out for when this becomes available!

Feature Creep:
Has there been any thought given to setting a sound standard for the 'Bee beyond the 1-bit clicking of port 2[6]?  Any of the popular sound generator chips of the 80s still available, or add something in to the FPGA?

I've had a preliminary look into adding a AY-3-891x compatible core into the FPGA.  Not committing to it at this stage.

Quote:Also, will there be enough room in the FPGA to add 1 or more sprites - handy for building a mouse-driven UI?
This is actually on the TO-DO list. I am planning to add (one)  'sprite' / hardware programmable graphic cursor, specifically thinking about mouse cursor.


RE: Classic Plus Development Updates - MbeeTech - 12-07-2022

Hey all.

Over the last few weeks I've done a lot of development work and proving out of the hardware.

To start with, I've added 3 more screen modes (thanks to 'Someone' for the suggestions and details)
which will make porting of games from machines like the ZX Spectrum a lot easier.
(See 'Someone''s posts regarding 'Microbee the ultimate doppleganger')

I've also done a fair bit of software work and written a Bresenham based line drawing routine and somewhat
optimized it (more to do) for the Classic-Plus 4 bit plane 640x256 mode (see photo below).
Additionally, I've written a BMP file reader (4 bits per pixel ) routine including palette loading etc. 
Still lots more to do, but its coming along very nicely.

[Image: CP20220712-1.jpg]  [Image: CP20220712-2.jpg]

                 Line Drawing routine                                                                4bpp Bitmap load


RE: Classic Plus Development Updates - CheshireNoir - 13-07-2022

Amazing work Ewan.
As always, thanks for sharing the progress with us. Can't wait to get my hands on one of these beauties when they are properly ready and available. Don't rush them. Release when you're good and ready.

Cheers!

John


RE: Classic Plus Development Updates - MbeeTech - 16-10-2022

Hello all.

Another update on the Classic-Plus.

Hardware Cursor / Sprite implemented.

Now there are three layers to the Microbee Screen Display :

Background : 4 plane graphics
Foreground :  Regular text & semi-graphics (re-programmable FONT gives basic PCG style characters)
Hardware Sprite / Cursor with transparency control (pixels with assigned colour zero do not appear / show content from Foreground / Background)

Hardware Cursor up to 64 pixels wide x 32 pixels high with 16 colours (15 + transparent) from any of the 16 foreground palettes.

To move the cursor is simple, just write the X and Y location to a couple of registers : No memory moves required.

[Image: CP_CURSOR.jpg]

[Image: CP_CURSOR_2.jpg]

Next up, implementing a Blitter / PixBlt  (Pixel block transfer) mechanism in hardware for 
fast screen to screen region movements / transforms.


RE: Classic Plus Development Updates - someone - 16-10-2022

Great stuff - It'll be a main star of "Kung Fury 3"!


RE: Classic Plus Development Updates - MbeeTech - 17-10-2022

(16-10-2022, 08:03 PM)someone Wrote: Great stuff - It'll be a main star of "Kung Fury 3"!

Haha... That's assuming that Kung Fury 2 ever comes out.   Shy


RE: Classic Plus Development Updates - MbeeTech - 06-03-2023

Hello All.

A bit of an update on the Classic Plus as It's been a while.

Nothing really to 'Show' at this point but there has been a lot of work done
in the FPGA logic to implement:

* M68K softcore processor
* UART module
* TIMER module
* Bus interface unit to both the internal Z80 bus peripherals (CRT controller registers,
   screen memories, other system control ports) and external Z80 bus for the M68K processor.
* Floppy disk Emulation logic
* Linear addressing for the M68K processor to access the 4 bit plane graphics
* SDcard interface

It's taken a while to get all that implemented but I'm pretty confident the logic is
pretty much 'Done'.  That being said, the design doesn't meet timing at the moment (it has setup & hold time
violations), so I have to work through that.  After I have it meeting timing I need to do some simulation to 
confirm the design and make sure the M68K core (M68Kods) has been implemented properly. I've used this
core before but in a xilinx environment rather than lattice so I had to re-implement a 16 longword dual port memory
that was a standard part under xilinx.

There are some other items that I'd like to implement in the FPGA, but when I get the above signed off I'll be
finalizing the hardware ready for production.

So, as mentioned, nothing really to show at the moment, but lots still happening.


RE: Classic Plus Development Updates - MbeeTech - 16-03-2024

Time for another update.

Large changes have been made in regards to the second processor.
I had planned to have an M68k softcore processor as the second process to handle the SDcard floppy disk emulation
be able to run in M68K mode for CP/M68K etc.
On evaluation, the performance of the core once timing had been met for the FPGA design was not as good as I was wanting.

So, to plan B :
As part of the design of the new SODimm module with the Lattice FPGA, I also included the option of loading a MC68SZ328 Dragonball
processor which can run up to 66Mhz, and so, I've committed to using this as the second processor.
I had some teething problems getting this going though - it would run some code & then go off it's tree.  It turned out, after a couple of
weeks of debug, that I had swapped 2 data pins (D14 & D15) on the pinout of the processor.  Once this was found and fixed, code started
running nicely.
I now have the Dragonball running simple boot code located in block ram in the FPGA.  That Boot code initializes the chip selects and
memory regions for the onboard memories, then loads run time boot code (for the floppy emulation, Boot file manager, OS etc.) from the FPGA
configuration flash (convenient place to store the M68K boot code). 
Additionally, it loads the Z80 boot rom image from the configuration flash and programs the 'Boot RAM' (normally the Microbee
boot rom) on the main board before handing control to the Z80 (in the case of booting into Z80 mode).
I designed the board to have RAM in place of the normal Boot ROM so that you can optionally load different boot Roms in place of the
standard included boot rom image.  For example, if you wanted to load a standard BN56 ROM image instead, you can do that, or 
perhaps even boot straight tape basic loaded in place of the normal boot rom.

Another major decision has been made as well.
The name of the Classic Plus, and the [256] TC Plus will be changing prior to release.
On reflection regarding these names, it makes the models sound like they are normal Premium series machines
with a few extra bits tacked on, which in reality is far from the case.
There is so much more to these new models than these names suggest, and more even that I am yet to
release details on, so they deserve to be known as new models in their own right.
There will be a launch day and the new names will be revealed at that time.
That day is getting closer.

I thought I would also mention about the long development time on this project, and while there has been quite a number
of setbacks in the design phase, there has also been other things holding it back.
In rebuilding the brand I have had to make sure there is diversification of income streams, and not just rely on one (retro-computing).
Additionally to traditional Microbee product offerings, there are 2 other areas that Microbee relies on and that is Design services (from
concept to prototype, and small production), and Surface Mount & Through hole assembly services.  Over the last 6 - 8 years, the SMD
loading part of the business has been something that has been grown significantly and we are now doing 600+ boards a month
through our pick and place machine. 
The benefit of this is that with this growth, development of Microbee product is now easier to allocate time to, but it has taken quite
a lot of time and effort to be at this point.
When I look back at the date on the prototype Classic Plus boards (2016) I do get quite disappointed that it has taken this long, and that
there has not been significant Microbee Product releases in all that time, however, I am pleased in the position that Microbee is now in
and poised for further growth this year.

More updates on the new models coming in the next weeks.

As always, thank you all for your continued interest and support.


RE: Classic Plus Development Updates - CheshireNoir - 18-03-2024

We're all waiting happily, Ewan.
Love to see it's still coming along. I know what my next tax return will go on.

Out of curiosity, (And pardon my ignorance if this has already been thought of), but could you have used a physical coldfire processor instead of a virtual dragonball? (I realise it would add to the cost if you already need the FPGA and have spare cells)

Cheers!

John