New Model Development Updates

[RetroBee]

G'day Simon.

That's a comprehensive post & a lot of Q's 
I'll only be able to give some brief answers at this point.

G'day Ewan,

Thanks for keeping this thread going. It's been great following the progress and reading the support.
I'm gearing up on my understanding for the new models before release and absorbing any information I can get from these threads and random discussions. My goal is game development on the new bees and producing content hopefully similar to the Amiga or the new ZX Spectrum Next. As the new Bees currently lack hardware sprites, I do have questions on the hardware to see if there are work arounds -

DISPLAY
1. With HDMI at 640x480 @ 75Hz, what refresh rate does software see? Is it ~50Hz or 75Hz?

At present, the vertical refresh bit in the CRT controller sees 75hz.

2. Is there a vsync or raster interrupt, and which CPU receives it?

There is the option via a jumper to connect VSYNC to the PIO as per usual, so only interrupt currently possible
on the z80

3. Can the bitplane display start address be changed, for page flipping and vertical scrolling?

Simple answer is no. The complex answer is that the bit planes are made up of PCG 'planes' rather than the standard
single map of ram for a bitplane.

4. Which character heights work in bitplane mode?

Any.  It's not dependant.  Having said that, the way the screen is laid out, and the way the bitplane mode was designed
for is 80 characters wide (640 pixels) by 16 characters high (16 characters x 16 rows = 256 pixels).

GRAPHICS
5. Is the PixBlt blitter still planned? Or was it finished?
• Does its source need to be in video memory?
• Is there any off-screen video memory?
• Does it support masking?
• Can the Z80, the 68K, or both drive it?

PixBlt has not been implemented as yet.  It is planned, but may not get included for the release.
Most likely a firmware (FPGA image) update later.

6. Do the hardware helpers (4-plane colour write, masking, OR/AND) work from the 68K side as well?

All of the screen functionality works exactly the same for z80 mode or 68k mode.

7. Is there any roadmap for more sprites?

Yes.  It will depend on what resources are left in the FPGA as to how many extra sprites will be implemented, and
they will be in a fixed priority scheme.

68K
8. In Z80 mode, can user code run on the 68K alongside the firmware? If so:
• How is it loaded?

At present, no. It has been something that has come up in discussion, but not planned
for implementation at this point.

• Is there shared memory or signalling between the two CPUs?
9. Can 68K code access the sound FIFOs, palettes, colour RAM and sprite registers?
10. Does the 68K have linear access to the bitplanes?

There is a control scheme that holds the Z80 in BUSACK state (mostly for the FDD emulation )
so that the 68k can have full access to the z80 memory & I/O, and the screen etc.
Both processors get access to all the I/O devices.

• Are the bitplanes in FPGA block RAM or external memory?

All screen memory is implemented in FPGA Block ram.

SOUND AND INPUT
11. What sample rate(s) will the stereo FIFOs support?

For z80 access, 8Khz sample rate. It would be tricky to get the Z80 (even at 20Mhz) to handle servicing
the FiFo's at greater than that I would think.  Samples rates up to 32Khz will be available for the 68k.

Is an AY core still a possibility at some point?

Yes, it's still on the wish list.

12. Will the original parallel-port joystick work?

Yes.

Are USB gamepads a possibility?

Maybe.


Sorry I can't be more specific on some of your points, but I'd be writing a manual to answer them fully.
I hope the above helps though.

Appreciate the quick update mate and thanks for your reply.  Much appreciated!

Cheers,
Simon